Efficient Gathering of Performance Information on Multicore Systems
Název práce v češtině: | Efektivní sběr informací o výkonu na multicore systémech |
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Název v anglickém jazyce: | Efficient Gathering of Performance Information on Multicore Systems |
Akademický rok vypsání: | 2008/2009 |
Typ práce: | diplomová práce |
Jazyk práce: | angličtina |
Ústav: | Katedra softwarového inženýrství (32-KSI) |
Vedoucí / školitel: | prof. Ing. Petr Tůma, Dr. |
Řešitel: | skrytý![]() |
Datum přihlášení: | 05.11.2008 |
Datum zadání: | 05.11.2008 |
Datum a čas obhajoby: | 02.02.2009 00:00 |
Datum odevzdání elektronické podoby: | 02.02.2009 |
Datum proběhlé obhajoby: | 02.02.2009 |
Oponenti: | RNDr. Jakub Yaghob, Ph.D. |
Zásady pro vypracování |
Modern multicore processors provide performance counters that export information on various essential aspects of software execution, from instruction decoding to cache utilization. Typically, a processor is capable of counting a small subset from hundreds of different event types, the events themselves can occur almost every processor clock tick. This yields a significant amount of data which is difficult to collect without disrupting the execution itself. The goal of the thesis is to apply compressive sampling - a special method of sampling signals that allows to reconstruct sparse signal from a small number of samples - to the performance counter data.
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Seznam odborné literatury |
[1] Intel 64 and IA-32 Architectures Optimization Reference Manual.
[2] Intel 64 and IA-32 Architectures Software Developer?s Manual, Volumes 1-3. [3] Intel 64 and IA-32 Architectures Application Note: TLBs, Paging-Structure Caches, and Their Invalidation. [4] Doweck, J.: Inside Intel Core Microarchitecture, Intel Corporation. [5] Candes, E. J.: Compressive sampling. In Proceedings of the International Congress of Mathematicians, 2006. |