Efficient Gathering of Performance Information on Multicore Systems

• Thesis title in Czech: Efektivní sběr informací o výkonu na multicore systémech
• Thesis title in English: Efficient Gathering of Performance Information on Multicore Systems
• Academic year of topic announcement: 2008/2009
• Thesis type: diploma thesis
• Thesis language: angličtina
• Department: Department of Software Engineering (32-KSI)
• Supervisor: prof. Ing. Petr Tůma, Dr.
• Author: hidden - assigned and confirmed by the Study Dept.
• Date of registration: 05.11.2008
• Date of assignment: 05.11.2008
• Date and time of defence: 02.02.2009 00:00
• Date of electronic submission: 02.02.2009
• Date of proceeded defence: 02.02.2009
• Opponents: RNDr. Jakub Yaghob, Ph.D.

Guidelines

Modern multicore processors provide performance counters that export information on various essential aspects of software execution, from instruction decoding to cache utilization. Typically, a processor is capable of counting a small subset from hundreds of different event types, the events themselves can occur almost every processor clock tick. This yields a significant amount of data which is difficult to collect without disrupting the execution itself. The goal of the thesis is to apply compressive sampling - a special method of sampling signals that allows to reconstruct sparse signal from a small number of samples - to the performance counter data.

References

[1] Intel 64 and IA-32 Architectures Optimization Reference Manual.
[2] Intel 64 and IA-32 Architectures Software Developer?s Manual, Volumes 1-3.
[3] Intel 64 and IA-32 Architectures Application Note: TLBs, Paging-Structure Caches, and Their Invalidation.
[4] Doweck, J.: Inside Intel Core Microarchitecture, Intel Corporation.
[5] Candes, E. J.: Compressive sampling. In Proceedings of the International Congress of Mathematicians, 2006.