Extensible disassembler with support for interactive instruction reordering
Název práce v češtině: | Rozšiřitelný disassembler s podporou interaktivního přerovnávání instrukcí |
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Název v anglickém jazyce: | Extensible disassembler with support for interactive instruction reordering |
Klíčová slova: | binary lifting|disassembler|decompiler |
Klíčová slova anglicky: | binary lifting|disassembler|decompiler |
Akademický rok vypsání: | 2021/2022 |
Typ práce: | diplomová práce |
Jazyk práce: | angličtina |
Ústav: | Katedra distribuovaných a spolehlivých systémů (32-KDSS) |
Vedoucí / školitel: | doc. Ing. Lubomír Bulej, Ph.D. |
Řešitel: | skrytý - zadáno a potvrzeno stud. odd. |
Datum přihlášení: | 02.03.2022 |
Datum zadání: | 07.04.2022 |
Datum potvrzení stud. oddělením: | 02.05.2022 |
Datum a čas obhajoby: | 13.09.2022 09:00 |
Datum odevzdání elektronické podoby: | 21.07.2022 |
Datum odevzdání tištěné podoby: | 25.07.2022 |
Datum proběhlé obhajoby: | 13.09.2022 |
Oponenti: | Mgr. Jakub Jermář |
Zásady pro vypracování |
Reverse engineering of program behavior from a binary executable requires a significant depth of knowledge and tools that convert the binary code to a human-readable form, of which the most common is assembly code. Because assembly code is difficult to understand, the best tools allow users to augment the disassembly with (some of the) information that was discarded during compilation. In general, users can assign names to addresses and constant values, model data structures, but very little can be done about the code itself.
With the exception of decompilers, which are rare, the output produced by disassemblers directly corresponds to the code in the binary image. This is a problem for compiler-generated machine code, because optimizing compilers will often interleave instructions computing independent values, which increases opportunities for instruction-level parallelism on modern processors, but makes the code more difficult to understand for human reader. The goal of this thesis is to develop an experimental disassembler which will allow the user to interactively shuffle instructions in the disassembly (to improve readability) within the boundaries determined by data/control flow analysis so that the program remains functionally equivalent. Even though the disassembler is only required to support a single processor, the processor support must be built on top of generic internal interfaces that will allow plugging-in support for other processors with different instruction set architectures. Similarly, the internal code representation should be sufficiently generic to enable future extensions implementing code analyses and transformations that will allow injecting lost information to the disassembly. |
Seznam odborné literatury |
[1] David, Y., Partush, N., Yahav, E. FirmUp: Precise Static Detection of Common Vulnerabilities in Firmware. ASPLOS, 2018.
[2] David, Y., Partush, N., Yahav, E. Similarity of Binaries through re-Optimization. PLDI, 2017. [3] Whelan, R., Leek, T., Kaeli, D. Architecture-Independent Dynamic Information Flow Tracking. Compiler Construction, 2013. [4] Anand, K., Smithson, M., Elwazeer, K., et al. A compiler-level intermediate representation based binary analysis and rewriting system. EuroSys, 2013. [5] Chipounov, V., Candea, G. Reverse Engineering of Binary Device Drivers with RevNIC. EuroSys, 2010. [6] Song D., Brumley D., Yin H. et al. BitBlaze: A New Approach to Computer Security via Binary Analysis. ICISS, 2008. [7] GHIDRA, https://ghidra-sre.org/ [8] Radare, https://www.radare.org/r/ [9] Hex-Rays, IDA, https://hex-rays.com/ida-free/ |